DSL's: Difference between revisions
From Modelado Foundation
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! style="width: 200;" | DSLs | ! style="width: 200;" | DSLs | ||
! style="width: 200;" | Name of the DSL | ! style="width: 200;" | Name of the DSL | ||
! style="width: 200;" | URL | ! style="width: 200;" | URL | ||
! style="width: 200;" | Target domain | ! style="width: 200;" | Target domain | ||
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! style="width: 200;" | Summary of the best results | ! style="width: 200;" | Summary of the best results | ||
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| | |D-TEC | ||
|Halide | |Halide | ||
|http://halide-lang.org | |http://halide-lang.org | ||
|Image processing algorithms | |Image processing algorithms | ||
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|''Associated X-Stack Project | |''Associated X-Stack Project | ||
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Revision as of 16:09, April 29, 2014
Sonia requested that Saman Amarasinghe and Dan Quinlan initiate this page. For comments, please contact them. This page is still in development.
| DSLs | Name of the DSL | URL | Target domain | Miniapps supported | Front-end technology used | Internal representation used | Key Optimizations performed | Code generation technology used | Processors computing models targeted | Current status | Summary of the best results | |
|---|---|---|---|---|---|---|---|---|---|---|---|---|
| D-TEC | Halide | http://halide-lang.org | Image processing algorithms | Cloverleaf, miniGMG, boxlib | Uses C++ | Custom IR | Stencil optimizations (fusion, blocking, parallelization, vectorization) Schedules can produce all levels of locality, parallelism and redundant computation. OpenTuner for automatic schedule generation. | LLVM | X86 multicores, Arm and GPU | Working system. Used by Google and Adobe. | Local laplacian filter: Adobe top engineer took 3 months and 1500 loc to get 10x over original. Halide in 1-day, 60 lines 20x faster. In addition 90x faster GPU code in the same day (Adobe did not even try GPUs). Also, all the pictures taken by google glass is processed using a Halide pipeline. | |
| Associated X-Stack Project | ||||||||||||
| URL | ||||||||||||
| Target domain | ||||||||||||
| Miniapps supported | (EXPRESS) | (TG) | (DEGAS) | (D-TEC) | (DynAX) | (X-TUNE) | (GVR) | (CORVETTE) | N/A | (PIPER) | ||
| Xstack projects involved | (EXPRESS) | (TG) | (DEGAS) | (D-TEC) | (DynAX) | (X-TUNE) | (GVR) | (CORVETTE) | N/A | (PIPER) | ||
| Internal representation used | (EXPRESS) | (TG) | (DEGAS) | (D-TEC) | (DynAX) | (X-TUNE) | (GVR) | (CORVETTE) | N/A | (PIPER) | ||
| Key Optimizations performed | (EXPRESS) | (TG) | (DEGAS) | (D-TEC) | (DynAX) | (X-TUNE) | (GVR) | (CORVETTE) | N/A | (PIPER) | ||
| Code generation technology used | (EXPRESS) | (TG) | (DEGAS) | (D-TEC) | (DynAX) | (X-TUNE) | (GVR) | (CORVETTE) | N/A | (PIPER) | ||
| Processors/computing models targeted | (EXPRESS) | (TG) | (DEGAS) | (D-TEC) | (DynAX) | (X-TUNE) | (GVR) | (CORVETTE) | N/A | (PIPER) | ||
| Current status | (EXPRESS) | (TG) | (DEGAS) | (D-TEC) | (DynAX) | (X-TUNE) | (GVR) | (CORVETTE) | N/A | (PIPER) | ||
| Summary of the best results | (EXPRESS) | (TG) | (DEGAS) | (D-TEC) | (DynAX) | (X-TUNE) | (GVR) | (CORVETTE) | N/A | (PIPER) |