DSL's: Difference between revisions
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Revision as of 16:02, April 29, 2014
Sonia requested that Saman Amarasinghe and Dan Quinlan initiate this page. For comments, please contact them. This page is still in development.
QUESTIONS | Name of the DSL | Associated X-Stack Project | URL | Target domain | Miniapps supported | Front-end technology used | Internal representation used | Key Optimizations performed | Code generation technology used | Processors computing models targeted | Current status | Summary of the best results |
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Name of the DSL | ||||||||||||
Associated X-Stack Project | ||||||||||||
URL | ||||||||||||
Target domain | ||||||||||||
Miniapps supported | (EXPRESS) | (TG) | (DEGAS) | (D-TEC) | (DynAX) | (X-TUNE) | (GVR) | (CORVETTE) | N/A | (PIPER) | ||
Xstack projects involved | (EXPRESS) | (TG) | (DEGAS) | (D-TEC) | (DynAX) | (X-TUNE) | (GVR) | (CORVETTE) | N/A | (PIPER) | ||
Internal representation used | (EXPRESS) | (TG) | (DEGAS) | (D-TEC) | (DynAX) | (X-TUNE) | (GVR) | (CORVETTE) | N/A | (PIPER) | ||
Key Optimizations performed | (EXPRESS) | (TG) | (DEGAS) | (D-TEC) | (DynAX) | (X-TUNE) | (GVR) | (CORVETTE) | N/A | (PIPER) | ||
Code generation technology used | (EXPRESS) | (TG) | (DEGAS) | (D-TEC) | (DynAX) | (X-TUNE) | (GVR) | (CORVETTE) | N/A | (PIPER) | ||
Processors/computing models targeted | (EXPRESS) | (TG) | (DEGAS) | (D-TEC) | (DynAX) | (X-TUNE) | (GVR) | (CORVETTE) | N/A | (PIPER) | ||
Current status | (EXPRESS) | (TG) | (DEGAS) | (D-TEC) | (DynAX) | (X-TUNE) | (GVR) | (CORVETTE) | N/A | (PIPER) | ||
Summary of the best results | (EXPRESS) | (TG) | (DEGAS) | (D-TEC) | (DynAX) | (X-TUNE) | (GVR) | (CORVETTE) | N/A | (PIPER) |