DSL's: Difference between revisions
From Modelado Foundation
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! style="width: 200;" | | ! style="width: 200;" | DSLs | ||
! style="width: 200;" | Name of the DSL | ! style="width: 200;" | Name of the DSL | ||
! style="width: 200;" | Associated X-Stack Project | ! style="width: 200;" | Associated X-Stack Project | ||
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! style="width: 200;" | Summary of the best results | ! style="width: 200;" | Summary of the best results | ||
|- style="vertical-align:top;" | |- style="vertical-align:top;" | ||
| | |DSL 1 | ||
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|''Associated X-Stack Project | |''Associated X-Stack Project | ||
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|''Target domain'' | |''Target domain'' | ||
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|N/A | |N/A | ||
|(PIPER) | |(PIPER) | ||
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|''Xstack projects involved | |''Xstack projects involved | ||
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|N/A | |N/A | ||
|(PIPER) | |(PIPER) | ||
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|''Internal representation used | |''Internal representation used | ||
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|N/A | |N/A | ||
|(PIPER) | |(PIPER) | ||
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|''Key Optimizations performed | |''Key Optimizations performed | ||
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|N/A | |N/A | ||
|(PIPER) | |(PIPER) | ||
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|- style="vertical-align:top;" | |- style="vertical-align:top;" | ||
|''Code generation technology used | |''Code generation technology used | ||
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|N/A | |N/A | ||
|(PIPER) | |(PIPER) | ||
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|''Processors/computing models targeted | |''Processors/computing models targeted | ||
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|N/A | |N/A | ||
|(PIPER) | |(PIPER) | ||
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|- style="vertical-align:top;" | |- style="vertical-align:top;" | ||
|''Current status | |''Current status | ||
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|N/A | |N/A | ||
|(PIPER) | |(PIPER) | ||
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|''Summary of the best results | |''Summary of the best results | ||
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Revision as of 16:04, April 29, 2014
Sonia requested that Saman Amarasinghe and Dan Quinlan initiate this page. For comments, please contact them. This page is still in development.
| DSLs | Name of the DSL | Associated X-Stack Project | URL | Target domain | Miniapps supported | Front-end technology used | Internal representation used | Key Optimizations performed | Code generation technology used | Processors computing models targeted | Current status | Summary of the best results |
|---|---|---|---|---|---|---|---|---|---|---|---|---|
| DSL 1 | ||||||||||||
| Associated X-Stack Project | ||||||||||||
| URL | ||||||||||||
| Target domain | ||||||||||||
| Miniapps supported | (EXPRESS) | (TG) | (DEGAS) | (D-TEC) | (DynAX) | (X-TUNE) | (GVR) | (CORVETTE) | N/A | (PIPER) | ||
| Xstack projects involved | (EXPRESS) | (TG) | (DEGAS) | (D-TEC) | (DynAX) | (X-TUNE) | (GVR) | (CORVETTE) | N/A | (PIPER) | ||
| Internal representation used | (EXPRESS) | (TG) | (DEGAS) | (D-TEC) | (DynAX) | (X-TUNE) | (GVR) | (CORVETTE) | N/A | (PIPER) | ||
| Key Optimizations performed | (EXPRESS) | (TG) | (DEGAS) | (D-TEC) | (DynAX) | (X-TUNE) | (GVR) | (CORVETTE) | N/A | (PIPER) | ||
| Code generation technology used | (EXPRESS) | (TG) | (DEGAS) | (D-TEC) | (DynAX) | (X-TUNE) | (GVR) | (CORVETTE) | N/A | (PIPER) | ||
| Processors/computing models targeted | (EXPRESS) | (TG) | (DEGAS) | (D-TEC) | (DynAX) | (X-TUNE) | (GVR) | (CORVETTE) | N/A | (PIPER) | ||
| Current status | (EXPRESS) | (TG) | (DEGAS) | (D-TEC) | (DynAX) | (X-TUNE) | (GVR) | (CORVETTE) | N/A | (PIPER) | ||
| Summary of the best results | (EXPRESS) | (TG) | (DEGAS) | (D-TEC) | (DynAX) | (X-TUNE) | (GVR) | (CORVETTE) | N/A | (PIPER) |