May 28-29 Technology Marketplace Sessions

The Technology Marketplace will be a place for peer-to-peer, at-the-laptop live demos and discussion of technologies being developed in the X-Stack portfolio and in coordinating programs.

A conference room will be set up with 15-20 tables, with two technologies per table. The demo giver will bring your laptop and work from that, or plan to log into your home systems (Wi-Fi and power provided). Browse an EMACS buffer to show compiler input and output, try new permutations suggested by your peers, show makefiles, time the wall clock, interact with visualizations. Show the places where the technology smokes the competition, and the unvarnished truth where your technology gives off smoke from stress. Plan for 4-5 people sitting with you looking over your shoulder, sharing ideas, asking questions, and innovating with you.

For accompanying materials, you can bring a small poster, or better yet, a printout of the concepts, schematics, and equations. Flipchart easels will be provided for you to sketch concepts live. We expect high participation of X-Stack performers, several technologies per team.

Technologies will be grouped by special interest sessions. The sessions are listed below with their coordinators.

1.X-Stack Runtime systems (Vivek Sarkar, vsarkar@Rice.edu) 2.Languages and DSL (Kathy Yelick, kayelick@lbl.gov) 3.Compilers (Dan Quinlan, quinlan1@llnl.gov) 4.Resilience (Andrew Chien, achien@cs.uchicago.edu) 5.Auto-tuning and Learning (Saman Amarasinghe, saman@csail.mit.edu) 6.Simulation technology (Shekhar Borkar, shekhar.y.borkar@intel.com)

Coordinators of the technology marketplace sessions should be contacting you to discuss your participation in their session (maximum is 6 technologies per session, due to space limitations). If you are not contacted by Tuesday, March 12, and would like to participate, please write to the relevant session coordinator.

Runtime Systems Technology Marketplace

Session Organizer: Vivek Sarkar, vsarkar@Rice.edu

Participants:

Compilers and Auto-tuning Technology Marketplace

Session Organizer: Mary Hall, mhall@cs.utah.edu

Participants:

Languages and DSLs Technology Marketplace

Session Organizers: Dan Quinlan, quinlan1@llnl.gov and Saman Amarasinghe, saman@csail.mit.edu

Participants:

Mapping and Optimization Framework Technology Marketplace

Session Organizer: Armando Solar-Lezama, asolar@csail.mit.edu

Participants:

Resilience Technology Marketplace

Session Organizers: Andrew Chien, achien@cs.uchicago.edu and Mattan Erez, mattan.erez@mail.utexas.edu

Participants:

Simulation Technology Marketplace

Session Organizers: Shekhar Borkar, shekhar.y.borkar@intel.com and Wilfred Pinfold,wilfred.pinfold@intel.com

Participants: